Previous Section Next Section

How This Book is Organized

This book is organized into five parts.

Part 1, Introduction, presents the basic concepts of functional verification to the user. It also explains why it is important to maximize verification productivity and the methodologies used to successfully verify a digital ASIC. Finally, it discusses how an environment can be modeled using e for effective verification. Part 1 contains two chapters.

Part 2, e Basics, discusses the e syntax necessary to build a complete verification system. Topics covered are basics such as struct/units, generation, procedural flow control, time consuming methods, temporal expressions, checking, and coverage. This section ends with a chapter that puts together all the basic concepts and explains how to run a complete simulation with an e-based environment. Part 2 contains nine chapters.

Part 3, Creating a Complete Verification System with e, takes the reader through the complete verification process of a simple router design. Topics discussed are design specification, verification components, verification plan and test plan. The section ends with an explanation of the actual e code for each component required for the verification of the router design. Part 3 contains two chapters.

Part 4, Advanced Verification Techniques with e, discusses important advanced concepts such as coverage driven functional verification, reusable verification components (eVCs) and integration with C/C++. Part 4 contains three chapters.

Part 5, Appendices, discusses important additional topics such as the e Quick Reference Guide and interesting e Tidbits. Part 5 contains two appendices.

Previous Section Next Section