Specman Elite and the Simulator are invoked concurrently and synchronize with each other during the simulation run. Specman Elite and the Simulator talk to each other through an interface that is included in a special file called a stubs file. The stubs file provides the channel for communication between Specman Elite and the Simulator.
An e environment is made up of objects declared using struct and unit keywords. These objects form the verification hierarchy. Static objects related to the environment are defined as unit. Variable objects such as stimulus items are defined as struct.
In e, the top level struct is always sys, and it is always defined implicitly. However, no structs are instantiated implicitly inside sys. All structs in the e environment must be explicitly instantiated in the sys tree structure. In Verilog, modules are instantiated to create hierarchy. In VHDL, entities are instantiated to create hierarchy.
A typical e-based verification environment may contain objects to represent data object (stimulus item), input driver, output receiver, data checker, protocol checker, and coverage analyzer. Some objects may not be present depending on the complexity of the verification process. These objects may be defined independently or as a part of another object.