Operator precedence is left to right, top to bottom in the list | |
[ ] list indexing | [..] list slicing |
[:] bit slicing | f() method or routine call |
. field selection | in range list |
{... ; ...} list concatenation | %{... , ...} bit concatenation |
~ bitwise not | !, not boolean not |
+, - unary positive, negative | *, /, % multiply, divide, modulus |
+, - plus, minus | >>, << shift right, shift left |
<, <=, >, >= boolean comparison | is [not] a subtype identification |
==, != boolean equal, not equal | ===,!== Verilog 4-state compare |
~, !~ string matching | &, |, ^ bitwise and, or, xor |
&&, and boolean and | ||, or boolean or |
!, not boolean not | => boolean implication |
a ? b : c conditional "if a then b, else c" |