A coverage-driven functional verification approach combines directed-random simulation with coverage to solve the problems with a traditional verification methodology. This approach greatly enhances productivity of the engineers and the quality of the DUT.
Both directed-random generation as well as coverage are provided in a unified manner in e syntax.
These e constructs enable a new verification paradigm that was not possible before with older tools.
In a coverage-driven functional verification methodology, the verification engineer goes through the following steps to verify a DUT (block, chip, or system):
Create a test plan that identifies all possible behavior of the DUT to be verified. Define coverage requirements on interesting items and state transitions in the DUT. This methodology requires that the test plan and the coverage requirements be very thorough because it sets up a reference for the measurement of 100% coverage.
Set up the verification environment with constraints (keep and keeping constraints) from the DUT specification and test plan. Specify coverage on interesting items and state transitions in the DUT using the cover struct member.
Run many directed-random simulations with different seed values. The constraints will ensure that the randomness is controlled and all interesting areas are touched. Most obvious bugs will be uncovered by random simulation with minimal manual effort.
Run coverage with random simulations to find out how many DUT areas have been tested. Coverage will tell what DUT cases have not been reached. Run random simulations with different seeds until no more DUT areas can be reached.
Refine the verification constraints of the verification environment to verify device behavior not previously possible. Directed tests are simply tests with lots of constraints. There is some manual effort but it is only focused on areas that are not reachable by random simulation.
Rerun functional coverage measurement with directed tests to ensure that all corner cases were covered.
Repeat steps 5 and 6 until you reach 100% coverage.
When you achieve 100% coverage, the verification is considered complete.
Figure 14-13 shows the coverage-driven functional verification methodology outlined in this section. This new verification paradigm is enabled because both directed-random simulation as well as coverage can be used as a combination from the very beginning of the verification effort. This was not possible earlier due to lack of integrated tools to do both directed-random simulation and functional coverage.
Using the coverage-driven functional verification paradigm has numerous productivity and quality advantages.
Minimal time is spent on directed tests at the beginning of the verification cycle. Usually, directed tests consume about 70-80% of the verification life cycle. That time is significantly shortened because directed-random simulations can be fired with minimal effort and can be completed in a short time.
Running directed-random simulations with multiple seeds at the beginning of the verification cycle reaches 80-90% of the interesting test cases. There is no need to spend the manual effort in creating directed tests to reach these test cases.
Directed tests are created only for the 10-20% hard-to-reach test cases that cannot be exercised by directed-random simulation. However, in this case, the goal of each directed test is very specific.
The number of directed tests is small. Therefore, maintenance of the verification environment is much simpler.
Since functional coverage is involved at each step, there is clear feedback about the effectiveness of each test, i.e., whether the test gives additional coverage. If the test increases coverage, it is retained, otherwise, it is discarded. This maximizes the engineer's productivity in creation and maintenance of tests.
The ultimate goal of any verification environment is to create a bug-free DUT with 100% coverage. With coverage-driven functional verification, there is a clear metric that tells when the verification is complete. This maximizes the quality of the DUT.