This chapter describes the complete DUT specification of a simple router design. This is not as big as a real router but mimics the basic functionality of a real router in a simple manner.
Input/output specification, packet format, input protocol, output protocol, and the state machine description were discussed for the DUT.
The HDL source code for the router design was discussed. The router is built from FIFOs and a state machine module. A top-level module instantiates the router module.
The verification environment consists of data object (struct packet), driver object (unit sbt_driver), receiver object (unit sbt_receiver), data checker object (unit sbt_scoreboard), monitor object (unit sbt_checker), coverage object (unit sbt_dut_cover), and environment object (unit sbt_env).
A typical test plan covers all possible scenarios for which a DUT needs to be tested. In this chapter, we have only described two simple test scenarios.